Press release; Jessie Shen, DIGITIMES
[Wednesday 12 December 2012]
Toshiba has announced the development of a
prototype memory element for a spin transfer torque magnetoresistive random
access memory (STT-MRAM). The new MRAM element achieves what the company claims
is the world's lowest power consumption yet reported, indicating that it has the
potential to surpass the power consumption efficiency of SRAM as cache
memory.
Like all digital products, mobile devices
including smartphones and tablets rely on high-speed memory to supply the main
processor with essential instructions and frequently requested data. Until now
SRAM has provided the cache-memory solution. However, improving the performance
of SRAM to match advances in mobile products results in increasing current
leakage, both during operation and in standby mode, degrading power
performance.
MRAM has emerged as an alternative to SRAM
because it is non-volatile, cutting leak current during standby status, Toshiba
noted. However, until now MRAM power consumption has exceeded that of SRAM,
throwing up a major barrier to practical application.
Toshiba indicated that its new memory element
advances the company's pioneering work in STT-MRAM and overcomes the
longstanding operating trade-off by securing improved speed while reducing power
consumption by 90%. The improved structure is based on perpendicular
magnetization and takes element miniaturization to below 30nm. Introduction of
this newly designed "normally-off" memory circuit with no passes for current to
leak into cuts leak current to zero in both operation and standby without any
specific power supply management.
Toshiba also confirmed the performance of the new
STT-MRAM memory element with a highly accurate processor simulator. This modeled
application of an STT-MRAM integrating the memory as cache memory and recorded a
two-thirds reduction in power consumption by a standard mobile chip set carrying
out standard operating functions, Toshiba said. This clearly points the way
toward the first MRAM with the potential to surpass SRAM in practical
operation.
Toshiba expects to bring the new memory element
to STT-MRAM cache memory for mobile processors integrated into smartphones and
tablets, and will promote accelerated R&D toward that end.
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