Wednesday, April 10, 2013

Processes below 40nm account for 27% of global wafer capacity, says IC Insights

More than 25% of installed wafer capacity worldwide was dedicated to the production of ICs having geometries smaller than 40nm as of the end of 2012, while about 22% of the global capacity was for mature process nodes at 90nm, and 0.13- and 0.18-micron, according to IC Insights.
At the end of 2012, about 27% of capacity was for devices having geometries smaller than 40nm. Such devices include high-density DRAM, which are typically built using 30nm- to 20nm-class process technologies; high-density flash memory devices that are based on 20nm- to 10nm-class processes; and high-performance microprocessors and advanced ASIC/ASSP/FPGA devices based on 32nm, 28nm or 22nm technologies.
Samsung Electronics was the largest supplier of ICs built using geometries below 40nm as of the end of 2012, followed by Intel, Toshiba/SanDisk, SK Hynix and Micron Technology, IC Insights observed.
About 22% of the global installed capacity was dedicated to ICs built at 90nm, 0.13-micron and 0.18-micron nodes, IC Insights said. These "mature" process technologies are mainly offered by pure-play foundries, including TSMC, UMC, Globalfoundries, SMIC and TowerJazz, IC Insights noted.
In addition, IC Insights pointed out that process technologies with geometries greater than 0.4-micron maintain "a fairly large share" of the global installed capacity, due to large quantities of commodity-type devices such as standard analog and general-purpose logic ICs. High-voltage power ICs also require large-geometry process technologies.

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